skip to main content
US FlagAn official website of the United States government
dot gov icon
Official websites use .gov
A .gov website belongs to an official government organization in the United States.
https lock icon
Secure .gov websites use HTTPS
A lock ( lock ) or https:// means you've safely connected to the .gov website. Share sensitive information only on official, secure websites.


Search for: All records

Creators/Authors contains: "Palermo, S"

Note: When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external site maintained by the publisher. Some full text articles may not yet be available without a charge during the embargo (administrative interval).
What is a DOI Number?

Some links on this page may take you to non-federal websites. Their policies may differ from this site.

  1. An RF photonic front-end using dual-differential driving scheme is reported with a 22nm CMOS FD-SOI driver co-integrated with a silicon traveling-wave Mach-Zehnder modulator. A compact design of power splitter and output routing network are implemented on dual-differential driver. An LC input matching network co-designed with bond wire inductance is implemented on a photonic chip to complete the output matching network. The proposed driver is verified with S-parameter and two-tone measurements, achieving 15-25GHz bandwidth with peak 3dBm IIP3 and consumes 448mW. The link performance is demonstrated 12.1% EVM of 16-QAM modulation with 2Gbd at 20GHz carrier frequency. 
    more » « less
    Free, publicly-accessible full text available June 15, 2026
  2. Growing interconnect bandwidth demand in large datacenters requires energy-efficient optical transceivers that operate with four-level pulse amplitude modulation (PAM4) to enable high per-wavelength data rates. Further increases in bandwidth density is possible by leveraging wavelength-division multiplexing (WDM), which optical link architectures based on silicon photonic microring modulators (MRMs) and drop filters inherently enable. This paper presents high-speed PAM4 transmitter and receiver front-ends implemented in a 28nm CMOS process that are co-designed with these silicon photonic optical devices to enable energy-efficient operation. The transmitter utilizes an optical digital-to-analog converter (DAC) approach with two PAM2 AC-coupled pulsed-cascode high-swing voltage-mode output stages to drive the MRM MSB/LSB segments. A 3.42Vppd output swing is achieved when operating at 80Gb/s PAM4 with an energy efficiency of 3.66pJ/bit. The receiver front-end interfaces with a silicon-germanium avalanche photodiode (APD) and utilizes a low-bandwidth input transimpedance amplifier followed by continuous-time linear equalizer and variable-gain amplifier stages. Biasing the APD to realize a gain of 2 allows for -7dBm optical modulation amplitude (OMA) sensitivity at 56Gb/s PAM4 with a BER=10-4 and an energy efficiency of 1.61pJ/bit. Experimental verification of the full PAM4 transceiver at 50Gb/s operation shows -4.66dBm OMA sensitivity at a BER~4x10-4. 
    more » « less
    Free, publicly-accessible full text available April 21, 2026